CAN V3.2 xilinx

[jalalba]

Hi
in CAN V3.2 xilinx core example design, when I'm simulating a can_v3_2_tb, I'm see Data sending and receiving operations are performed successfully but CAN_PHY_TX and CAN_PHY_RX always High (Does not change).

So how are the data transmitted?

 

[FlyingDutch]

Hi
in CAN V3.2 xilinx core example design, when I'm simulating a can_v3_2_tb, I'm see Data sending and receiving operations are performed successfully but CAN_PHY_TX and CAN_PHY_RX always High (Does not change).

So how are the data transmitted?

Hello

did you have a "loopback" CAN configuration? If not who is sending CAN frames of outside your circuit?

Best Regards