Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Can anyone help to analysize this small circuit?Thanks.

Status
Not open for further replies.
A

ADDA

Newbie level 4
Joined
Jul 19, 2006
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,309
Can anyone help to analysize this small circuit?Thanks.
 

it's a bootstrap circuit which will generate a clock of 2*Vdd pulse high.
 

    A

    ADDA

    Points: 2
    Helpful Answer Positive Rating
Btrend said:
it's a bootstrap circuit which will generate a clock of 2*Vdd pulse high.
Click to expand...

Can you explain in detail?
I simulated this circuit ,but the output of the mos transistor is still Vdd,not 2*Vdd,:cry:
 

Change M1 & M2 to PMOS, and floating the well to avoid forward condution.
 

what is the result of simulation for PMOS?
 

I ran simulation of this circuit,and it worked well.

The input clock from 0 to vdd,
the output of the nmos source is vdd to 2vdd.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top