Cadence UMC18 process

[bestvlsi]

Hi All,

I am designing a VCO block for PLL . I have few doubts

1. I am using 2 different types of MOS transistors

a. Normal MOS transistors N_18_MM ,and

b.RF MOS transistors N_L18W500_18_RF . Is is it ok to use two different types of MOS transistors in the design?


2. Also in the corner analysis I ve located the files corresponding lib file for N_18_MM but I am not able to find those for RF MOS transistors , although there are two libraries for RF , core_rf_v2d4 and io_rf_v2d3 ... among these two i think the first is the one corresponding to the RF MOS transistors N_L18W500_18_RF . Am I correct ? Pls do tell the model libraries name if you know.

Regards.

 

[jimito13]

Is is it ok to use two different types of MOS transistors in the design?

Ofcourse it is ok.

For the second issue i can't answer since i've never used this process.