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breakdown voltage vs. voltage supply

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Cluny

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Hello everyone,

I need some help with my (first) power amplifier. the bipolartransistor I'm using for has a breakdown-voltage Vceo = 2.2V and my supervisor told my that I have to use 3.3V voltage supply. So my question is... is it really possible to use this configuration? I mean you have maybe also to consider that there will be a voltageswing up to 6.6V (theorie).

Furthermore I did some simple dc-analysis and obtained a transfercharacteristic Ic(Vbe) that looks not like ~ I = exp (Vbe). In the treshold-region (~0.8V) there is a undesired negative currentpeak.

I hope that someone can help me with some hints.
 

I'm sorry about the confussion. Power amplifier means only that I'm using a simple common emitter topology for creating a power amplifier. - My problem seems to be that I cannot handle with these different breakdown voltages.

VCEO = 2.2V
VCBO = 7.7V (similar to VCES???)
VEBO = 3.0V


Actually I understand that the absolut collector-emitter breakdown voltage depends on the effective resistance seen by the base. For example: If I have a current source for biasing the base, the VCEO seems to be the realistic value for the collector-emitter-breakdown, since a current source has a high output impedance (base open circuited).
So maybe I should have a small resistance seen by the base to get a higher CE breakdown voltage (~VCBO) because I have a voltage supply of VCC = 3.3V (VCEbias = 3.3V, VCEmax ~= 5.8V).

So my conclusion is that it is possible to use the transistor (depending on the bias circuit) but I'm not complete sure.

Cluny
 

Cascode?

2V BVceo is damn wimpy. Must be a high-zoot SiGe or
sump'n.

Maybe you just want to ensure that the base impedance
is adequately low, and push it toward BVces. But this is
probably outside reliability ratings and if you have data
to go on, best be sure it covers high temp (worse) and
process outliers. We used to respect the BVceo as the
"no worries" limit and very rarely tried to push it, in the
high-rel business. If it's just gotta last until the lab grade
comes back, then maybe you just go for it.

But I think you ought to look at cascode topologies. Just
make real sure your Zbase is very low on the upper
device because it'll act quasi-inductive if not.
 

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