devashishraval
Newbie level 4
I want to implement BPSK modulator and demodulator in verilog on spartan 3 kit.
If anyone has done that on any fpga, i request your guidance...
I know the concept that for transmitting '0', we send the sinusoid as it is and for '1' we add 180 phase shift to the sinusoid.
I request guidance on following points
- BPSK modulator, demodulator blocks those can be coded in verilog and ported to an FPGA.
- How do we generate I and Q sinudoid in fpga?
- Can we use only one one sine wave and its inverted version and give it to a 2:1 mux inputs with select line supplied by input data to be modulated. here for '0' information bit we can pass sine wave and for '1' we can send the inverted version.
- Can we use the DCM(Digital Clock Manager) of the FPGA for BPSK modulation?
Thanx in advance.
If anyone has done that on any fpga, i request your guidance...
I know the concept that for transmitting '0', we send the sinusoid as it is and for '1' we add 180 phase shift to the sinusoid.
I request guidance on following points
- BPSK modulator, demodulator blocks those can be coded in verilog and ported to an FPGA.
- How do we generate I and Q sinudoid in fpga?
- Can we use only one one sine wave and its inverted version and give it to a 2:1 mux inputs with select line supplied by input data to be modulated. here for '0' information bit we can pass sine wave and for '1' we can send the inverted version.
- Can we use the DCM(Digital Clock Manager) of the FPGA for BPSK modulation?
Thanx in advance.
