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artificial neural network on fpga

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pankajrisc

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design of neural network on fpga

hi friends
I am doing a project on "FPGA Implementation of Artificial Neural Network(ANN)"
Can anyone suggest me some resources for ann and its implementaion on fpga?
-pankaj
 

which neural network are u planning to implement??
is it a network requiring dynamic update of weights,and also structure or
is it static one like PNN,GRNN,etc..??
 

hi pankajrisc & pranavam
ANN implementation with FPGAs is very popular nowadays Im doing the same one and use spartan3E so there is some problem as you now about port using
Can you share your ideas with us?
10x
 

oh sure

Added after 2 hours 10 minutes:

what s ur actual problem in port usage....?
 

hi

You can find a journal on this topic in spinger.
or in citeshare.com
 

thanx pranavam your answer came faster then I tought... :)
so When I use I/O of my FPGA (Spartan3E XC3S200E)
What should I use to control the voltage on I/O?
I dont know maybe I didnt explain the main problem but I want to save the FPGA :)
So there must be layer between FPGA ports and the driven project...
I will be waiting here :p
thanx
 

FPGA Implementations of Neural Networks
By Amos R. Omondi (Editor), Jagath C. Rajapakse (Editor)
Number Of Pages: 360
Publication Date: 2006-04-21
Publisher: Springer

**broken link removed**
3.8 MB
MiRROR:http://depositfiles.com/files/573696


Table of contents:

Preface.
1. FPGA Neurocomputers; A.R.Omondi, J.C.Rajapakse and M.Bajger.
2. Arithmetic precision for BP networks; M.Moussa, S.Areibi and K.Nichols.
3. FPNA: Concepts and properties; B.Girau.
4. FPNA: Applications and implementations; B.Girau.
5. Back-Propagation Algorithms Achieving 5 GOPS on the VirtexE; K.Paul and S.Rajopadhye.
6. FPGA Implementation of Very Large Associative Memories; D.Hammerstrom, C.Gao, S.Zhu and M.Butts.
7. FPGA Implementations of Neocognitrons; A.Noriaki Ide and J.Hiroki Saito.
8. Self Organizing Feature Map for Color Quantization on FPGA; C-H.Chang, M.Shibu and R.Xiao.
9. Implemention of Self-Organizing Feature Maps in Reconfigurable Hardware; M.Porrmann, U.Witkowski and U.Rückert.
10. FPGA Implementation of a Fully and Partially Connected MLP; A.Canas, E.M.Ortigosa, E.Ros and P.M.Ortigosa.
11. FPGA Implementation of Non-Linear Predictors; R.Gadea-Girones and A.Ramrez-Agundis.
12. The REMAP Reconfigurable Architecture: a retrospective; L.Bengtsson, A.Linde, T.Nordstrom, B.Svensson and M.Taveniku.
 
Thank u very much for the document..
I have lots of this kinda files but this is quite cool... ;)
I must be hurry time is running.. :D
 

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