kirill
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Hello!
I have some questions about gclk pins in spartan 6 die. I want to output frequency from fpga to external board. I know that gclk pins is dedicated clock pins and they directly connected to bufg. I tried to synthesis necessary frequency with a help of fpga pll and output it through gclk, but ISE generated error. ISE offered to use ODDR2 component. I applied this suggestion. But if i use such method I can use gpio pins and they will be the same like gclk, if comparison criteria is signal's quality, skew. Am I right? And I assume that GCLK pins can directly attach to global clock net only as inputs.
I know that there are a lot of similar threads in the forum, but definite answer i did not find.
Thank you!
I have some questions about gclk pins in spartan 6 die. I want to output frequency from fpga to external board. I know that gclk pins is dedicated clock pins and they directly connected to bufg. I tried to synthesis necessary frequency with a help of fpga pll and output it through gclk, but ISE generated error. ISE offered to use ODDR2 component. I applied this suggestion. But if i use such method I can use gpio pins and they will be the same like gclk, if comparison criteria is signal's quality, skew. Am I right? And I assume that GCLK pins can directly attach to global clock net only as inputs.
I know that there are a lot of similar threads in the forum, but definite answer i did not find.
Thank you!