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Our company released a Graphic chip, which was PCI Express interface.
It seem that PCIE can provides very high bandwidth even though its large latency comparing DDR interface.
Is it possible to acheive the maximum x1 PCI Express throughput of 256x2=512 MB/s using PCI Express bridge?
I mean will the data coming out at PCI end of PCI Express bridge be at 256 MB/s ?
And can the data coming in into PCI end of PCI Express bridge be at 256 MB/s ?
Or the PCI 32/33 bottleneck will still cut it down to 133MB/s ?
If so, then what is the idea of PCI Express bridge in terms of achieving higher bandwidth / throughput for back-end devices?
Dear all,
I need some user guide of Denali pureSpec model of PCIe.
So if you have user guide of Denali pureSpec modle,
Please upload that user guide.
Thank you very much for your help.
Tran.
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