Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Anyone designed a comparator with NMOS only

Status
Not open for further replies.

analogic

Junior Member level 1
Joined
Nov 24, 2004
Messages
17
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
164
say for 1MHz sampling rate and 9bit resolution, is it possible to design a comparator with only NMOS? if we consider only regenerative comparator, and dont consider amplifier based comparator.

i m thinking it is impossible, because if NMOS as latch and the load is also NMOS (gate connected to CLK or Vdd), the initial gain will be on the order of gm1/gm2, and the regenerative time will be very long, so not feasible. does anyone has some idea or comment?

Thanks.
 

I think you have difficulty to get 9bit resolution comparator if you don't use preamplifier.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top