lastcowboy32
Newbie level 3
We've measured temperatures of 90C-100C on the case at room temperature. The part itself can withstand a 150C junction temperature, but there are two of these op-amps heating up our entire board. Other devices aren't running optimally with all of the heat around.
We need to run the op-amp from +/-12V; in order to have the proper voltage range for the outputs.
The each part is a dual package with the first op-amp driving the other, and the second op-amp is driving the gate of a FET. The FET drive is analog (as in holding the gate voltage to vary the channel resistance); so it's not switching. The signal levels are very small.
I'm thinking that there must be a part with similar noise/drift specifications, the same SOIC 8 footprint and a lower power dissipation.
???????
What is the power dissipation method that's cooking this part?
Is that dissipation method something inherent to its design (i.e. it's a mostly Bipolar design) that another op-amp (i.e. FET-based) would have lower power?
We need to run the op-amp from +/-12V; in order to have the proper voltage range for the outputs.
The each part is a dual package with the first op-amp driving the other, and the second op-amp is driving the gate of a FET. The FET drive is analog (as in holding the gate voltage to vary the channel resistance); so it's not switching. The signal levels are very small.
I'm thinking that there must be a part with similar noise/drift specifications, the same SOIC 8 footprint and a lower power dissipation.
???????
What is the power dissipation method that's cooking this part?
Is that dissipation method something inherent to its design (i.e. it's a mostly Bipolar design) that another op-amp (i.e. FET-based) would have lower power?