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Actual silicon, concept of "x" state

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sr_starlight

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Hi,

In actual silicon, there is no concept of "x" or unknown. Right? So we can only see a 1/0. So how does seeing an "x"(unknown) in simulation translate to the actual value you see on the chip?
Does it mean that we get an unpredictable value on the chip?


Thanks
 

x could be predictable or not predictable on silicon, depending on the source of x. x from conflict or uninitialized seq cell is not predictable.
 

'X' denotes a unknown value. This means that the output of circuit is not known at a given time, it may be either 0 or 1. This happens in silicon also like initial sate of a counter or some other sequential circuit is not known. When you is power up initial sate of sequential circuit is unknown. You can have a known value by resetting it. Sequential circuit also may go in unknown state during its operation. This may happens due to poor design of circuit.
 

You have two different concepts both modelled as "X". There's the X meaning "it could be zero or one, and I can't determine mathematically that it is one or the other". For example when using uninitialized memory, ...

There's also a timing violation that may cause metastability. This metastable state is oscillating somewhere inbetween clear zero and one levels and is also modelled using "X". Given some small time it will decay into either a good zero or one, but unpredictably, and therefore becomes the first kind of "X" I described after it settles. But during the metastability this second kind of X'es can be seen as different logic levels by different parts of the circuit and are therefore more complex than just "Could be either one or zero" X'es.
 

in actual Silicon , we only have "0" or "1", for memory or some register which have no initial value, it will have random value for "0" or "1"!
 

"X" is a simulation debug feature to identify where the contention or unpredictive state comes. In actual silicon as you all said there would not be any "X". Only valid value either "0" or "1" based on the cell or memory charecteristic (Vendor based). In memories (except ROM) some specific vendors have all "0" in actual silicon and that get refreshed after reset.
For Simulation "X" is feature to debug the verification engineer to actually identify where the timing is violated, where the outputs are un-initialised, where memories are not pre-loaded, where inputs are not provided.

-paul
 

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