About Memory Hierarchy Issue

[javatea]

Hi Folks,

In practice, we used register file, sram, dram as our storage devices for implementation of memory hierarchy. The capacity and performance (memory access speed ) is always a trade off.
I were asked a question. "why not use SRAM to build L1, L2 and L3? SRAM is faster than DRAM, maybe we could use many SRAMs to build a DRAM." Is it possible/feasible?
I know cost is an issue in this question.
Any other issues could explain why not build SRAM everywhere in our memory hierarchy?
e.g.
L1 : SRAM
L2 : many many SRAMs
Thank you.

 

[microKernel]

This question is just a 'catch' to check if you know what is Cache.

Cache is actually SRAM. The difference that we can say is that it is on-chip with processor i.e. on-chip-SRAM is cache.

 

[javatea]

Thank you.
But my question is
If SRAM is faster, why not use SRAM to build everywhere?

 

[microKernel]

Besides cost you need to think about power and space.

SRAM has a lower density than DRAM.
It is also more power hungry as compared to DRAM.

Vice versa for cache!