haosg
Advanced Member level 4
any future for asic design
Hi, all
I know most of you are hardware designer, from architecute to synthesised netlist. maybe some through backend to gdsii.
But I'm pure implementation engineer. that from rtl to synthesized netlist.
i.e. synthesis and DFT(internal scan, BIST, BSD). and help backend for timing closure. Though I have finish some SOC chip, but I'm also fear my future.
you know the tools will be more and more powerful. the stage will don't need persons.
About my job , any senior give some proposal.
Thanks very much.
Hi, all
I know most of you are hardware designer, from architecute to synthesised netlist. maybe some through backend to gdsii.
But I'm pure implementation engineer. that from rtl to synthesized netlist.
i.e. synthesis and DFT(internal scan, BIST, BSD). and help backend for timing closure. Though I have finish some SOC chip, but I'm also fear my future.
you know the tools will be more and more powerful. the stage will don't need persons.
About my job , any senior give some proposal.
Thanks very much.