easyads
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Hi
We are designing an 802.11b/g direct conversion receiver. The main problem in direct conversion receiver is dc offset . There are several methods to solve this dc offset proble.
The first method is to use HPF(RC HPF or analog seveo loop to realize HPF function) in analog baseband amplifier to eliminate dc offset. The corner frequency of HPF is about 10KHz in order not to destroy the quality of received signal. Each time AGC changes gain of one block in receiver, HPF will settle again and this will cause much time because the corner frequency of HPF is about 10KHz. This phenominon can be solved through the following means: a succesive switching is implemented to gradually decrease the bandwidth of the HPF from 1MHz to 10KHz in three discrete steps in order to decrease the settling time of HPF.
The second method is to use DSP to evaluate the DC offset and feedback it into the receiver through 7 bit DAC.
The question is as follows:
1. Among the above two method. which one is popular in 802.11b/g product?
2. For second method (use DSP to evaluate the DC offset and feedback it into the receiver through 7 bit DAC),IF AGC changes the gain of one block, the whole dc offset of the receiver will changes abruptly, how to solve this problem? Could you please provide me some detailed therory about this method(DSP based dc offset cancellation) or provide me some papers related with this?
my email is easyads@163.com
We are designing an 802.11b/g direct conversion receiver. The main problem in direct conversion receiver is dc offset . There are several methods to solve this dc offset proble.
The first method is to use HPF(RC HPF or analog seveo loop to realize HPF function) in analog baseband amplifier to eliminate dc offset. The corner frequency of HPF is about 10KHz in order not to destroy the quality of received signal. Each time AGC changes gain of one block in receiver, HPF will settle again and this will cause much time because the corner frequency of HPF is about 10KHz. This phenominon can be solved through the following means: a succesive switching is implemented to gradually decrease the bandwidth of the HPF from 1MHz to 10KHz in three discrete steps in order to decrease the settling time of HPF.
The second method is to use DSP to evaluate the DC offset and feedback it into the receiver through 7 bit DAC.
The question is as follows:
1. Among the above two method. which one is popular in 802.11b/g product?
2. For second method (use DSP to evaluate the DC offset and feedback it into the receiver through 7 bit DAC),IF AGC changes the gain of one block, the whole dc offset of the receiver will changes abruptly, how to solve this problem? Could you please provide me some detailed therory about this method(DSP based dc offset cancellation) or provide me some papers related with this?
my email is easyads@163.com