A simulation method that verifies the frequency stability of a circuit during transients (during enable operation). However, it is stable in the lstb

[dressler6]

This is the case of a 3 stage amp with negative feedback.

The output is a source follower, so amplification is done twice.
If you look at the method of finding the loop gain using lstb in hspice, the phase margin is 90'.
However, there is gain peaking at frequencies after the unit gain frequency, and the gain margin is -20dB.

The following are my questions.
1. When this circuit is enabled, oscillation occurs. It is clearly stable in the lstb simulation of the steasy state. Please explain how it can be verified with a simulation other than '.tran' (e.g. AC simulation or lstb simulation or .pz simulation).

2. The control system considered that the stability of the transient section should be checked with the characteristic equation of the closed loop transfer function.
Does that mean it should be viewed as a root locus?

3. If number 2 is correct, sweep the variable k at the root locus, how should it be applied to the above-mentioned regulator?

 

[dick_freebird]

"Clearly stable" may be subject to small-signal vs large-signal behavior differences. Like if a device that's "off" or
low current, in small signal, turning "on" during slewing.

Trying to direct-drive a fat FET with a low power op amp
may not work well and that device's gain will swing with
load current and voltage headroom, linear vs saturation region, etc. If the FET is PMOS that gain-swing will be huge
and you may be transiting the region where that happens
in .tran, but nothing at all of that happens in .ac

 

[dressler6]

"Clearly stable" may be subject to small-signal vs large-signal behavior differences. Like if a device that's "off" or
low current, in small signal, turning "on" during slewing.

Trying to direct-drive a fat FET with a low power op amp
may not work well and that device's gain will swing with
load current and voltage headroom, linear vs saturation region, etc. If the FET is PMOS that gain-swing will be huge
and you may be transiting the region where that happens
in .tran, but nothing at all of that happens in .ac

Thank you for your important teaching.

But I still have questions.
After designing the system as above, stability is verified by tran simulation in all PVTs. As with time-efficient design by verifying stability with 'lstb of hspice', I am curious about how to verify the stability of transients.
(In the control system, stability verification during transients seems to have been studied as a closed loop transfer function.)

 

[FvM]

A startup transient is not necessarily an oscillation. At least the sketched waveform in post #1 doesn't seem to indicate an oscillation. More generally, loop gain is a small signal description and doesn't tell about large signal behaviour.

 

[dressler6]

A startup transient is not necessarily an oscillation. At least the sketched waveform in post #1 doesn't seem to indicate an oscillation. More generally, loop gain is a small signal description and doesn't tell about large signal behaviour.

Thank you for your teaching.

After designing the system as above, stability is verified by tran simulation in all PVTs. As with time-efficient design by verifying stability with 'lstb of hspice', I am curious about how to verify the stability of transients.
(In the control system, stability verification during transients seems to have been studied as a closed loop transfer function.)

 

[BigBoss]

If "Gain Margin" and "Phase Margin" is time dependent, you have nothing to do because these circuits are called as "Time Variable" . All you can do is to define a large Phase Margin and Gain Margin to prevent it to oscillate even this would not guarantee the oscillation.
Time Variable systems are most incomprehensible systems therefore a consistent diagnosis is not always possible.

 

[dressler6]

If "Gain Margin" and "Phase Margin" is time dependent, you have nothing to do because these circuits are called as "Time Variable" . All you can do is to define a large Phase Margin and Gain Margin to prevent it to oscillate even this would not guarantee the oscillation.
Time Variable systems are most incomprehensible systems therefore a consistent diagnosis is not always possible.

Thanks for the useful teaching.

https://www.edaboard.com/threads/how-this-peaking-can-cause-the-stability-of-the-system.66585/

According to #12 of this link, the stability can be seen by the Q value.
I wonder how I can get a solution with this.

I only have a circuit, and finding the transfer function is complicated.
Can you please tell me which function of Hspice or Spectre to find Q and determine if it is unstable.

Also, it is thought that the stability determination by Q is trying to find the RHP pole. Please tell me how to actually determine the stability in Hspice or Specter.

 

[FvM]

As previously mentioned, I don't recognize instability in the shown waveform. The startup transient behaviour may be nevertheless unwanted. It's up to you to specify the wanted behaviour, e.g. monotonous rise. It's also necessary to specify expected load transients and acceptable voltage response. Loop gain and complex output impedance are only small signal quantities, large signal behaviour depends on the stimulus waveform. If you don't expect fast load transients you may fix the startup behaviour by a reference low pass (soft start).