HolySaint
Full Member level 3
Code:[color=green]STIL 1.0 { CTL P2001.10; Design P2001.10; } Header { //Date ""; //Source "" //History {} } Variables { // Define Constaints here using IntegerConstant syntaxi } Signals { "Q"[4..0] Out; "CLK" In; "CEN" In; "A"[11..0] In; } Environment "rom_test" { // snps_rom4rc CTL Mission_mode { TestMode Normal; Family SNPS_memory; } CTL BIST_mode { TestMode InternalTest; Internal { "Q"[4..0] {DataType MemoryData ; } "CLK" {DataType MasterClock { ActiveState ForceUp ; } } "CEN" {DataType CoreSelect { ActiveState ForceDown ;} } "A"[11..0] {DataType MemoryAddress ; } } Relation { Port'"Q"[4..0] + "CLK" + "CEN" + "A"[11..0] '0; } } }[/color]