Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

90nm CMOS transistor model parameters

Status
Not open for further replies.

daylight

Newbie level 2
Joined
Mar 31, 2009
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,294
90nm cmos

Hello,

I'm trying to model 90nm CMOS transistor static and dynamic properties using Silvaco ATLAS software. Requirements are: gate width range 90 nm - 9 microns, temperature range -10 ... +70 °C. If someone could please come up with reference or hints about ATLAS command language specifically in modeling 90nm CMOS.

Where can I get 90nm CMOS transistor model parameters?
 

cmos 90nm transistors

may you could get something from the predictive technology models
**broken link removed**
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top