Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Harware implementation of data compression

Status
Not open for further replies.

rockgird

Junior Member level 3
Joined
Apr 28, 2006
Messages
30
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,288
Activity points
1,543
hii ,
i m working on hardware implementation of some data compression technique, have to write a verilog code n then synthesize it on an FPGA.
can any one tell me which is the best compression technique for hardware.
i mean faster n less power consuming.

thanx
 

What type of data you would like to compress, voice / video / graphic??
 

Hi,does this differ from bit stream compression,i mean any thing video or audio represented in bit-streams.
 

hi..what kind of compression do you want?
the lossy or lossless compression.for lossless data compression,according to the compression performance on the memory data set,i suggest the x-match data compression.
 

Hi
which is the best algorithm for hardware implementation depends on your usage,
but if you need high speed decompression:
LZ algorithms which are dictionary based, is better than other algorithm. in thease family lz77 and lzss have a high speed decompression rate.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top