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how to run transient simulation with time varying resistance

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cjsnare

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transient simulation dc source

Hello.

I want to run a simulation using cadence(icfb). The simulation should show time transient result with a time varing resistor value. Basically, I want to assign the value of resistor as res = sin( w* time) + some offset. Is there any way to do this?
The value of the resistor should vary along with the time variable of a transient simulation.

Thank you!
 

spectre voltage controlled resistor vccs

maybe you can use voltage control resistor, then the control voltage can change with time.
 

spice time varying resistance

cjsnare said:
Hello.

I want to run a simulation using cadence(icfb). The simulation should show time transient result with a time varing resistor value. Basically, I want to assign the value of resistor as res = sin( w* time) + some offset. Is there any way to do this?
The value of the resistor should vary along with the time variable of a transient simulation.

Thank you!

Verilog-A should easily solve this problem. sin(x) is a built-in function in Verilog-A.
even ahdl (analog hdl) should have support for this kind of implementation.
 

pspice time varying resistor

Of course you can have the functionality in Verilog A. You can model a resistor in Verilog A as :

I(in,out) <+ V(in,out)/R;
where you can model R as
parameter real R = Ro + sin(w*t);
remember to mark the nodes in and out as electrical.
 

spice time varying resistor

Thank you for replying!

I meant the simulation using "Virtuso Analog Design Environment".
I need to run a transient analysis. but I dont know what function or what variable gives the time during the transient analysis.

If I can access the time, then I would be able to write as a cap value something like,

sin( 'time' * some constant )

Again, thank you for your help.

CJSnare
 

ltspice howto voltage dependent current source

Dear cjsnare,

Actually SPICE/spectre can simulate Verilog A models. Hence go ahead with the modelling of that particular resistor. Your "Virtuso Analog Design Environment" should be able to simulate Verilog A models.
 

pspice time-varying resistor

Thank you very much!
 

ltspice time variable

Actually you can model a resistor by using a voltage controlled current source or a current controlled voltage source. For example if you are going to use a voltage controlled current source, just make the gain of the source equal to 1. Then your applied (control) voltage source will be equal to inverse of the resistance of the controlled branch. Verilog is just fine, but you could accomplish the same thing by using the elements already available in any spice.

Best regards,
v_c
 

Re: how to run transient simulation with time varying resist

v_c said:
Actually you can model a resistor by using a voltage controlled current source or a current controlled voltage source. For example if you are going to use a voltage controlled current source, just make the gain of the source equal to 1. Then your applied (control) voltage source will be equal to inverse of the resistance of the controlled branch. Verilog is just fine, but you could accomplish the same thing by using the elements already available in any spice.

Best regards,
v_c

Hi v_c,
Actually, they are not the same. I think the impedance effects will not be modeled correctly by using your proposed approach. For example, if the resistor is used as a load in an amplifier, the Verilog-A model will show proper impedance behavior, but using vccs or icvs will not model impedance effects correctly (ideal impedance behavior). Because of this reason, you will get different results with your proposed model.

Bharath
 

Re: how to run transient simulation with time varying resist

both verilog-A and the controlled source are modeling i=Gv, where G is the conductance, so I believe they will be the same. I believe the code for the controlled source is very similar, if not identical, to the verilog-A model.
 

Re: how to run transient simulation with time varying resist

v_c said:
both verilog-A and the controlled source are modeling i=Gv, where G is the conductance, so I believe they will be the same. I believe the code for the controlled source is very similar, if not identical, to the verilog-A model.

An ideal vccs is similar to a current source, it has a high output impedance.

Suppose you use the two resistor models in a resistively (R) loaded NMOS differential amplifier such that R << rds. With Verilog-A resistor model, the gain will be gm*R whereas with an ideal vccs resistor model, the gain will be gm*rds (as Output impedance of vccs >> rds).

Bharath
 

Re: how to run transient simulation with time varying resist

I don't understand why this would be different. The VCCS is being used *exactly* as a resistor -- it has the same equation as the resistor! It is a current source, but it is a *controlled* current source, so it's output impedance is not necessarily high. Now if this was a independent current source, then I would say, yes the output impedance is very, very high. But having a controlled current source and having V/I ratio controlled makes this identical.

Here's some PSpice code

G1 1 2 value={v(1,2)/R}

in this source, the controlled current from node 1 to 2 is controlled by the voltage from 1 to 2 divided by R. PSpice allows you to enter in actual expression instead of a simple number for resistance R, so you can do something like

G1 1 2 value={v(1,2)/v(R)}

where the voltage from node R to 0 (ground) can be varied in any way you like (as long as it is not zero) to basically emulate a arbitrary, time-varying resistance.
So just put an *independent* voltage source at node R to ground and vary it anyway you like. You might have to put some resistance, say 10k, to ground from node R because PSpice might not like floating voltage source nodes.

Best regards,
v_c
 
Re: how to run transient simulation with time varying resist

v_c said:
I don't understand why this would be different. The VCCS is being used *exactly* as a resistor -- it has the same equation as the resistor! It is a current source, but it is a *controlled* current source, so it's output impedance is not necessarily high. Now if this was a independent current source, then I would say, yes the output impedance is very, very high. But having a controlled current source and having V/I ratio controlled makes this identical.

Here's some PSpice code

G1 1 2 value={v(1,2)/R}

in this source, the controlled current from node 1 to 2 is controlled by the voltage from 1 to 2 divided by R. PSpice allows you to enter in actual expression instead of a simple number for resistance R, so you can do something like

G1 1 2 value={v(1,2)/v(R)}

where the voltage from node R to 0 (ground) can be varied in any way you like (as long as it is not zero) to basically emulate a arbitrary, time-varying resistance.
So just put an *independent* voltage source at node R to ground and vary it anyway you like. You might have to put some resistance, say 10k, to ground from node R because PSpice might not like floating voltage source nodes.

Best regards,
v_c

Let us define some notations for my reply :

VCCS : Current source whose value of current Iout is dependent on input voltage Vin

Vout : Voltage of the node where the current source output is connected (with respect to ground).

Now, the VCCS tracks the current as a specific ratio ,ie, Iout = g*Vin irrespective of the voltage fluctuations in the node Vout.
If the voltage at node Vout varies by a factor of 10, then the current Iout still is g*Vin.

The definition of an ideal current source is that the current is constant irrespective of the fluctuations in voltage across it, which gives it a high output impedance. Now, for the VCCS, irrespective of voltage variations at node Vout, the current still is an exact functin of Vin (g*Vin).
This makes the output impedance of the VCCS high because the current exactly follows Vin, irrespective of voltage variations at Vout (hypothetically, Vout can be million volts, Iout still is g*Vin, by definition).

When you use a Verilog-A model, the resistor is actually connected between two nodes, which gives it the actual impedance value. For a VCCS, the output impedance (to ground) is high because of the above explanation.


Bharath
 

Re: how to run transient simulation with time varying resist

Just try it and you will see it works.

I know what you are saying with the voltage, but an actual resistor which is varying will see the same thing.

Also note that current flows from 1 to 2 and the voltage that this depends on is also 1 to 2. This works -- trust me.

Code:
Test time-varying resistance
E1 1 0 value={10*sin(time)}
R1 1 2 10
G1 2 0 value={v(2,0)/v(R)}

ER R 0 value={3 + 2*cos(time)}
RR R 0 10k   ; arbitrary

.probe
.tran .01 10 0 .01 uic
.end

Here I am modeling a resistor with resistance equal to 3+2*cos(time) ohms, so the resistance will vary from 1 to 5 ohms. This is set by the source ER, it can be set any way you like as long as there is something at node R, I am using the E sources as a convenient way to specify time sources. The G1 source is simply a resistor, its current depends on its voltage divided by R. Attached is a plot of V(2)/I(G1) which is in fact its output resistance.

You might have a different situation but I would like to see your evidence.
 

Re: how to run transient simulation with time varying resist

v_c said:
Just try it and you will see it works.

I know what you are saying with the voltage, but an actual resistor which is varying will see the same thing.

Also note that current flows from 1 to 2 and the voltage that this depends on is also 1 to 2. This works -- trust me.

Code:
Test time-varying resistance
E1 1 0 value={10*sin(time)}
R1 1 2 10
G1 2 0 value={v(2,0)/v(R)}

ER R 0 value={3 + 2*cos(time)}
RR R 0 10k   ; arbitrary

.probe
.tran .01 10 0 .01 uic
.end

Here I am modeling a resistor with resistance equal to 3+2*cos(time) ohms, so the resistance will vary from 1 to 5 ohms. This is set by the source ER, it can be set any way you like as long as there is something at node R, I am using the E sources as a convenient way to specify time sources. The G1 source is simply a resistor, its current depends on its voltage divided by R. Attached is a plot of V(2)/I(G1) which is in fact its output resistance.

You might have a different situation but I would like to see your evidence.

Hi v_c,

Change the value of resistor RR (which you have as 10K Ohms now) from value of 0.01 Ohm to 100 MegaOhms. Let me know what is the value of the current you have out of node 2 as you vary the value of RR. Based on that, we can discuss further.

Bharath
 

Re: how to run transient simulation with time varying resist

That has absolutely no effect at all, because the voltage at R depends on the voltage source ER. I can put any value there at all as long as it is not zero. That value of RR is only there because PSpice does not like floating nodes.
 

Re: how to run transient simulation with time varying resist

v_c said:
That has absolutely no effect at all, because the voltage at R depends on the voltage source ER. I can put any value there at all as long as it is not zero. That value of RR is only there because PSpice does not like floating nodes.

If you put any value of RR there and the current doesn't change (isn't that similar to an ideal current source?), it means that you have a high impedance node (Node 2), which is what i have been trying to convey to you :)
A resistor should have a variable current based on voltage across it, ie, what is voltage across it, say Vr.
current = Vr / R(t) (in this post, R is variable in time). In your implementation, if Voltage at Node 2 varies by a factor of 2, current is not Vr/R(t), but a constant value...
Maybe we can have this discussion offline...

Bharath
 

Re: how to run transient simulation with time varying resist

The node voltage at R is the *controlling* node so this is not really where the loading is going on. The actual resistor current is from node 2 to 0, so if you wanted to discuss loading this should be directed at node 2. Note that I am not trying to implement a current source like found on ICs -- this is not my purpose at all. And from your questions, I gather that you are thinking along the lines of practical implementation.
I am not saying that what I am showing can be implemented in reality -- that was not my purpose. If you have access to a simulator, just try it and you will see.

Node R is really "decoupled" from the rest of the circuit and does not interact with it.
It only influences v(R) which is used in the implemented resistor. So you can treat voltage at R as an independent voltage.

Best regards,
v_c
 

Re: how to run transient simulation with time varying resist

v_c said:
The node voltage at R is the *controlling* node so this is not really where the loading is going on. The actual resistor current is from node 2 to 0, so if you wanted to discuss loading this should be directed at node 2. Note that I am not trying to implement a current source like found on ICs -- this is not my purpose at all. And from your questions, I gather that you are thinking along the lines of practical implementation.
I am not saying that what I am showing can be implemented in reality -- that was not my purpose. If you have access to a simulator, just try it and you will see.

Node R is really "decoupled" from the rest of the circuit and does not interact with it.
It only influences v(R) which is used in the implemented resistor. So you can treat voltage at R as an independent voltage.

Best regards,
v_c


Node R is not decoupled as you are modeling a resistor. That node is going to be connected to other nodes in a bigger circuit, so loading is very much a problem there :). You are not always going to simulate this standalone, otherwise this subcircuit as a " time varying resistor model" would not be useful. Each of the two nodes of the resistor could be connected to any two nodes in a circuit with arbid voltage swings.

Coming to the original question in the post, how to implement a time varying resistor -
Resistor is a two-terminal device, which has a variable current based on voltage across it, ie, what the voltage across it is at any instant in time, say Vr.
current = Vr / R(t) (in this post, R is variable in time). In your implementation, if Voltage at Node 2 (or node R, based on which node is being loaded) varies by a factor of 2, current is not Vr/R(t), but a constant value...

Please indicate ** very clearly ** in your spice deck where the two terminals of the resistor are, since the resistor model can be used as a subcircuit in another circuit. Once you indicate the two terminals of the resistor, we can further continue our discussion.

Also, I am purely talking about simulation and not thinking in any way about implementation :D

Bharath
 

Re: how to run transient simulation with time varying resist

I think you are getting confused about node R. That node is strictly for generating and arbitrary signal that is
supposed to give us the the value of R. Nothing else will be connected to that node.

Take a look at the attached file for a schematic of my system. What I gave was a particular application, but yes
you can use this as a subcircuit as follows.

.subckt var_res plus minus control
Gpm plus minus value={v(plus,minus)/v(control)}
Rcontrol control 0 10k
.ends var_res

so this resistor has the normal terminals plus and minus and has an extra terminal called control.
Even though control is a voltage, the subcircuit interprets this as the resistance value. So if you
put a 3V source at control, this will be a 3 ohm resistor. And this subcircuit is totally re-usable.
I think what may be confusing is the fact that the varying value of the resistance is being set
by a voltage -- there is nothing we can do about this, spice only understands voltage and current.
So just try out this subcircuit, first with a constant voltage at v(control) to see if this really works
as a resistor -- I think you will find that it works just fine. Then, you can try to put any arbitrary
voltage at the control node, whatever voltage you put there in volts will be the resistance (in ohms)
of the node from plus to minus.

Best regards,
v_c
 

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