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Voltage level shifting in CMOS logic 0.18um UMC technology

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husseinadel

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i have an input from standard CMOS logic 0.18u UMC technology,, it works on supply 1.8v and swings from 0 to 1.8 ,,for a design considerations,, i want to take this input and make it swings from 0 to 3.3v,,i.e. i want to make a level shifting ,,,i would like any suggestons,,,,thanks

regards
hussein adel
ASU
Egypt
 

LEVELS shifting

Use one NMOS, connect it's gate to 1.8V .
connect it's source to output signal (0-1.8V).
use one resistor between drain and 3.3V supply.
Now, you will get 0-3.3V swing at output.
 
Re: LEVELS shifting

Davood Amerion said:
Use one NMOS, connect it's gate to 1.8V .
connect it's source to output signal (0-1.8V).
use one resistor between drain and 3.3V supply.
Now, you will get 0-3.3V swing at output.

thanks,, i think there is a misleading point

*when input is zero volt, assuming Vth=0.65,,so Vgs-Vth=1.15,,means Vds min.=1.15 to be in saturation "if it works as a switch ",,,but as in this situation it works in triode,,is this will not affect the speed issues??
thanks
 

LEVELS shifting

It is the most easy way move 1.8 to 3.3.
the value of resistor decided by the nmos w/l.
the value of resistor must more than the impedance of NMOS.
If ur use level shift in PCB,it is good way.
If u use the circut in IC.
I don't think it is a very good way.
I think the latch comparator of 3.3V, compare the 1.8v invert's input and output.
you can get 0-3.3V swing at latch's output.
 

Re: LEVELS shifting

jerryzhao said:
It is the most easy way move 1.8 to 3.3.
the value of resistor decided by the nmos w/l.
the value of resistor must more than the impedance of NMOS.
If ur use level shift in PCB,it is good way.
If u use the circut in IC.
I don't think it is a very good way.
I think the latch comparator of 3.3V, compare the 1.8v invert's input and output.
you can get 0-3.3V swing at latch's output.
can you give me more details about the latch compararor of 3.3?,,,,,what i know is to use comparator operate at 3.3 ,and the comparison level is 1.8/2 volts,, but i dont want to use an opamp comparator i want some more simpler one,,,,,,also why using the NMOS as a level shifter not good in IC????

thanks
 

Re: LEVELS shifting

husseinadel said:
....

thanks,, i think there is a misleading point

*when input is zero volt, assuming Vth=0.65,,so Vgs-Vth=1.15,,means Vds min.=1.15 to be in saturation "if it works as a switch ",,,but as in this situation it works in triode,,is this will not affect the speed issues??
thanks

When input is zero NMOS transistor is in triode region and it's Vds is very little.
in this way Vds depend on drain current.
if drain current = 0 then Vout = Vin.
resistor can be replaced with current source if needed.
it's value depend on next stage which transistor drive it.
because when input = 1.8V NMOS transistor is off,
and output voltage = 3.3 V - ( resistor value * output high current).
 

Re: LEVELS shifting

U should care your application.
If u don't care speed and current. U can use a nmos with resistor loading or pmos loading.
If you want to know latch comparator ,see attached file.
I think u can analyze it by yourself.[/i]
 

Re: LEVELS shifting

jerryzhao said:
U should care your application.
If u don't care speed and current. U can use a nmos with resistor loading or pmos loading.
If you want to know latch comparator ,see attached file.
I think u can analyze it by yourself.[/i]

speed is very critical to me
this latch comparator seems to be lowering the speed of the circuit,,
 

LEVELS shifting

Hi. You can use Texas Instrument's level converters like - SN74LVC1T45DBV - 1-bit bidirectional, 75-420MBps, 1.65V-5.5V.
\**broken link removed**

Best Regards.
 

Re: LEVELS shifting

petarpav said:
Hi. You can use Texas Instrument's level converters like - SN74LVC1T45DBV - 1-bit bidirectional, 75-420MBps, 1.65V-5.5V.
\**broken link removed**

Best Regards.

thanks for replying ,but i think what you are talking about is for discrete components ,,while i was asking for integrated solutions as i work on IC ,,also the forum is IC Design ,,the other forum of analog circuit design is for the discrete one

thanks for contribution
 

LEVELS shifting

Hello husseindal,

take a loock on jerryzhao's schematic , the second one "tries" to cut the path between the Avdd 3.3 volt to the ground so it means it's the faster one.
On my point of view you can use the second one up to some 100 MHz without any problem (good duty cycle) , but you need problably put a buffer (1V8)instead of a wire for the second path (first path is with the 1V8 inverter).
 

Re: LEVELS shifting

MLR67 said:
Hello husseindal,

take a loock on jerryzhao's schematic , the second one "tries" to cut the path between the Avdd 3.3 volt to the ground so it means it's the faster one.
On my point of view you can use the second one up to some 100 MHz without any problem (good duty cycle) , but you need problably put a buffer (1V8)instead of a wire for the second path (first path is with the 1V8 inverter).

i am working at 1 GHz,, so i need very simple level shifter ,,,i thought of using one NMOS ,,
 

Re: LEVELS shifting

Oh! 1Ghz, I never design my level shift so high speed.:D
 

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