Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

transistor-level PLL simulation

Status
Not open for further replies.
F

freewing

Member level 1
Joined
Mar 16, 2005
Messages
35
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,288
Activity points
1,592
When I do transient simulation of a PLL circuit using Spectre in Cadence, the simulation takes forever. 100 ns transient analysis takes one hour. What can I do to make the smulation faster? Thx.
 

use initial condition. this is to say, set the initial voltage of cap a value near the needed( not ov)
 

use alternative simulator, like Adit or Hsim or Nanosim
 

If you want to get an accurate results, you can use spectreverilog in Cadence to simulate the PLL. Digital circuit using verilog model, and analog using spectre. The speed will be much improved.

Yibin,
 

You have to get used to it PLL simulation is very slow due to the disparity in time constants, some of them very high, some very low. 1 hour is not much, I had simulations running for 1 week for 15us on a 2.4GhZ machine.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top