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  1. #1
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    VHDL process fundamentals

    Hi,

    I'm new with logic design and simply don't get my process behaviour. I don't understand why adding a line:"temp1 <= '0';" affects to LED blink frequency?
    Yes, I know that this code does not make sense, but it is just an example. I think that if-statement should always be true, since I set temp1 to 1 just before it, but apparently it is not!

    Code:
    *************************
    process (clk)
    begin
    	if rising_edge(clk) then
    		temp1 <= '1';
    		if(temp1 = '1') then
    			temp1 <= '0'; -- if this line is added, then LED blink half as fast
    
    			if temp2 = '1' then
    				LED <= '0';
    		                temp2 <= '0';
    			else
    				LED <= '1';
    		                temp2 <= '1';
    			end if;
    		end if;
    	end if;
    end process;
    ****************************
    Last edited by KlausST; 9th March 2017 at 13:55. Reason: added code tags

    •   Alt9th March 2017, 13:51

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  2. #2
    Advanced Member level 5
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    7 years registered

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    Re: VHDL process fundamentals

    If temp1 was '0' before, then on the first clock edge temp1 will be '0', and '1' on the next clock edge. Signals are only updated when process suspend - assignments to them only schedule the value to be assigned at some point in the future. This is opposite to variables, which are updated immediately.



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