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global clock and local clock

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in FPGA what do we mean by global clock or local clock.. linke in spartan 3E 5O Mhz clock is used,i think this is global clock, what is local clock then?
 

Hi,

\The Global clock is the main system clock routed through global clock buffer which is uses optimized rotes dedicated for clock. Local clock are the bifurcation of the global clock and routed locally inside a clock region.
 

UltraGreen said:
Hi,

\The Global clock is the main system clock routed through global clock buffer which is uses optimized rotes dedicated for clock. Local clock are the bifurcation of the global clock and routed locally inside a clock region.
Click to expand...


in spartan 3E board , 50 MHz clock is the global clock?
 

In Spartan 3e board 50 Mhz would be the external clock, oscilator frequency. The global clock would be the clock routing in your design through global clock buffer. if you are using DCM/mmcm then the output will automatically routed through global clock buffer.
 

I don't find a lot of use in describing a clock net as global / local.
Most non-trivial designs will tend to have more then one clock domain. And they should all be considered GLOBAL.
Bifurcation of clocks inside an FPGA should only be done via a dedicated component that has access to dedicated clock routes (PLL / DCM / MMCA / etc...)
All other "timing" signals should be treated as synchronous enables rather than proper clocks.
 

global/local, for FPGAs, is more related to the clock buffer used. For example, newer devices have io clock buffers, regional clock buffers, multi-region clock buffers, and global clock buffers.

Regional clock buffers are the most local, only being available to a smaller area of the IC.
 

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