dc gain and gain BW product of OTA

Can any one tell me while designing an OTA why we need high DC gain and gain bandwidth product.(GBW)?
I am designing an OTA for very low frequency range application. Do I need high gain of OTA.

I have designed an OTA but its DC gain is -3.4dB. What does this mean? And I don't understand what its GBW be? The BW at -3.4 dB is 16KHz.

I will be using this OTA in designing low frequency filter

I have designed an OTA but its DC gain is -3.4dB.

Click to expand...

What does this mean? Unit of OTA gain is transconductance V/A, so -3.4 dB might translate to 675 mS, or is it 675 µs, or something different?

Generally, the gain and GBW required for a filter depends on the filter topology and designed quality factor.

You may or may not need high GBW product. OTAs
have a couple of virtues - simplicity, and ease of
compensating them to suit (simple shunt C to ground).
With low C they can be pretty fast.

Driving ohmic loads, though, is not what they're for.

thanks for your reply. I have designed an OTA and when I run its ac analysis, the graph plot is between V(dB) vs Frequency. and that V(dB) is -3.4 dB and frequency is 16KHz.

what does tha DC gain of OTA show? I mean its purpose?

Thanks

What about an answer to FvM`s question in post#2?
What did you simulate in your ac analysis? Are you aware that an OTA is characterized by its TRANCONDUCTANCE?
(Remember a transistor, which also acts as a transconductance device).

I designed a folded cascode OTA with PMOS as the input differential pair. I want DC gain of 80dB. but I dont know whats wrong when I do ac analysis the graph between V(dB) and frequency shows the gain i.e. V(dB) -3.4dB. please click the below link to view the image of the folded cascode OTA which I want to design.

https://obrazki.elektroda.pl/2761605900_1479314641.png

If the OTA with purely capacitive load has a DC gain of -3.4 dB (0.68), there's something seriously wrong with either the OTA design or the simulation setup. Is the output possibly in saturation due to unsuitable bias?

You can of course measure an OTA DC voltage gain, which calculates as transconductance * output resistance, but it's no particularly meaningful quantity.

Can you please help me in the designing of this OTA. I have all the transistors in saturation. What do you mean by unstable bias?

O.K., saturation is the expected operation for MOSFET. DC output voltage should be biased around mid-supply, is it?

DC output voltage means the voltage to be checked at the output where capacitor is placed. I am using 1.8 V supply.

OTAs, especially simple ones, lose gain big-time when
the output gain device, or load device, goes into its
linear (MOS) region; gm*Ro with Ro dropping when
output gets within ~Vgs(op) of either rail. I'd guess
that your useful output range on a simple OTA would
be ~ 0.5 - 1.3V for a 1.8V supply; outside this range
the DC gain (and Vio) will degrade markedly.

If you want to apply classical op amp characterization
to an OTA you need to include / specify a proper (i.e.
application-realistic) load to get voltage in, voltage
out basis. Now the application may have only some
other CMOS gate terminals as the load - but this is
for you to say, the OTA itself don't know nuthin'.
You might (if it's general purpose) check out a series
or matrix of RL (to what voltage?), CL to see across
what range of signal and load the amplifier is useful
or acceptable.