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why modelsim industrial standard?

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arbalez

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why modelsim is the most popular eda tool for practicing and designing using vhdl, verilog and systemc code?

is it because we must write our own testbenches to test our UUTs? unlike any other tool that has integrate testbench within its software?
 

i don't think ms is industrial standard. ms is a good tool for epld/fpga or module design. for whole chip, i think vcs & nc better.
 

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