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[SOLVED] MOSFET input resistance + input capacitance

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CHL

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Does a MOSFET have a pole?

Hello

Typically we say an input impedance of a MOSFET is infinity.

However, there is a leakage in the oxide, so it has a resistance.

Also, there are capacitors at the input.

In this case, can we say there is a pole inside a FET?
 

No, "we" do not typically say the input impedance of a MOSFET is infinity, we say the input resistance is infinity.

The input leakage is so small, and the MOSFET input capacitance is so high that the leakage has no effect on the frequency response at any MOSFET operating frequency of interest.
 

crutschow said:
No, "we" do not typically say the input impedance of a MOSFET is infinity, we say the input resistance is infinity.

The input leakage is so small, and the MOSFET input capacitance is so high that the leakage has no effect on the frequency response at any MOSFET operating frequency of interest.
Click to expand...

There must be defects in the insulator between the gain and the channel. Can't it be a resistor?

Also, a MOSFET has a transit frequency and it is an intrinsic cut-off frequency.

Doesn't it mean that a FET has a pole?
 

The gate-source forward leakage current of a IRFZ44 Mosfet when its Vgs is very high at 20V is a maximum of only 100nA which is 0.1uA.
Then its input resistance is 20V/0.1uA= 200M ohms and is much higher when the input voltage is less. I have never seen a resistor with a value higher than 20M.

The datasheet specifies typical switching speeds with certain very low Rg and Rd values.
 

CHL said:
Doesn't it mean that a FET has a pole?
Click to expand...

Yes, it does. Location of the pole depends on the resistance and capacitance, because the resistance is finite and the capacitance is non-zero.

- - - Updated - - -

crutschow said:
The input leakage is so small, and the MOSFET input capacitance is so high that the leakage has no effect on the frequency response at any MOSFET operating frequency of interest.
Click to expand...

It is the other way; the input resistance and the capacitance determine the operating frequency of interest.

(I guess you meant that the input capacitance is so low, right?- high input resistance and HIGH INPUT CAPACITANCE will make a lousy device)
 
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    CHL

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There's two "resistances". One is the gate oxide DC leakage
and the other is the gate access resistance, in series with
the gate capacitance. This latter is poly gate sheet resistance
and pattern dependent (is your gate contacted at one edge
of the die, or over-strapped and contacted throughout the
die area? Is the poly silicided or only doped?). The access
resistance does create a meaningful gate "pole" (ask anyone
doing RFICs in CMOS) and this resistance, with Cgd, makes
your fT/fmax to first order.

The DC resistance is meaningless in this sense, all but the
access resistance portion of it is in parallel with the Cgg
and contributes nothing to operation (presuming it's not
much lower and an artifact of some defect or damage).
But the series access resistance is something that you
would like modeled if you're pushing the FET frequency-
wise.
 
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yes every mosfet has a pole, largely dictated by the driving impedance of the gate driver, this is an important consideration in driving mosfets in active loads...
 

dick_freebird said:
There's two "resistances". One is the gate oxide DC leakage
and the other is the gate access resistance, in series with
the gate capacitance. This latter is poly gate sheet resistance
and pattern dependent (is your gate contacted at one edge
of the die, or over-strapped and contacted throughout the
die area? Is the poly silicided or only doped?). The access
resistance does create a meaningful gate "pole" (ask anyone
doing RFICs in CMOS) and this resistance, with Cgd, makes
your fT/fmax to first order.

The DC resistance is meaningless in this sense, all but the
access resistance portion of it is in parallel with the Cgg
and contributes nothing to operation (presuming it's not
much lower and an artifact of some defect or damage).
But the series access resistance is something that you
would like modeled if you're pushing the FET frequency-
wise.
Click to expand...

Does it mean that every mosfet has two poles? Or each pole is a second-order pole? Good engineers always stay away from poles but how can we?
 

A Mosfet is usually used as a DC switch. But you talk about "poles" so maybe you want to use a Mosfet as a high frequency amplifier?
Then you must deal with its high gate-source and drain-gate capacitances.
 

Not really two poles, because any gate leakage is parallel to,
not in series with, the gate oxide capacitance. Say your gate
access resistance is 10 ohms, your leakage at Vgs=10V is
10nA and your Cgg is 10nF. That makes your network give
a corner frequency of 1/(2*pi*10*10E-9 or 1.6MHz. This
would indicate the so-parameterized FET is not a good idea
for >1MHz switching.

The leakage "resistance" is a shunt, not a series, resistance.
It does not contribute to gate RC in any meaningful way and
does not create a 0.016Hz pole, as evidenced by the fact
that people find the devices useful for anything at all.
 

dick_freebird said:
Not really two poles, because any gate leakage is parallel to,
not in series with, the gate oxide capacitance. Say your gate
access resistance is 10 ohms, your leakage at Vgs=10V is
10nA and your Cgg is 10nF. That makes your network give
a corner frequency of 1/(2*pi*10*10E-9 or 1.6MHz. This
would indicate the so-parameterized FET is not a good idea
for >1MHz switching.

The leakage "resistance" is a shunt, not a series, resistance.
It does not contribute to gate RC in any meaningful way and
does not create a 0.016Hz pole, as evidenced by the fact
that people find the devices useful for anything at all.
Click to expand...

so, in conclusion, when we consider a gate resistance in high frequency applications, the MOSFET itself has a pole. The pole frequency will be very high since the resistance and capacitance are very small.

Is that right?
 

Gate R should be small, gate C may be large (but this
depends on perspective) - 10nF for a big fat low-RDSon
power FET is not unreasonable.
 

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