Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

[Moved]: AD9915 Reference Clock Maximum Power??

Status
Not open for further replies.
A

ali ghafoor

Member level 4
Joined
Feb 11, 2011
Messages
69
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Activity points
1,779
AD9915 is DDS manufactured by Analogue devices. I am unable to find the maximum power level of reference clock that can be applied to its evaluation board (also manufactured by analogue devices) from the datasheet. The IC assumes a differential Reference Clock, and evaluation board provides an interface for Single-ended reference clock and then converts it into differential using an IC named as ADCLK925BCPZ-WP. Can i apply a single-ended clock of +10dBm to this evaluation board without damaging AD9915
 

Re: AD9915 Reference Clock Maximum Power??

Up to the ADCLK925 datasheet,
Code: 
The inputs have center tapped, 100 Ω, on-chip termination resistors.
... i.e. 50Ω input impedance. For environment conditions between -40°C to 85°C they can do with min. 0.2 and max. 3.4Vp-p input voltage. i.e. between -1dBm and +23.6dBm.

The ADCLK925 will then provide the correct clk input levels to the AD9915.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top