Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

reactive ion etching

Status
Not open for further replies.
Silicon wafers get fully covered by metal, then by an isolating layer (oxide, nitride). Lithography via masks defines areas where no metal routing should stay. Reactive ion etching removes the isolating layer and the metal below. At the end of this process, just when the routing connections are "cleared", i.e. cut off from residual metal, they can be charged by the impinging ions. If their metal area is large, enough charge can be caught to generate a voltage which causes a damaging break-through of the gate oxide. If a silicon junction is connected to such a metal wire, there's no such problem due to leakage.
 
  • Like
Reactions: ZekeR

    Z

    ZekeR

    Points: 2
    Helpful Answer Positive Rating
As I told above: junction leakage current is sufficient, it doesn't damage the junction. That's the reason why any junction connected to metal or poly saves these routing connections from antenna violation (i.e. the connected gate from destructive voltage break-through).
 
Junction leakage suffices because (1) the charging rate is low
and (2) the UV / soft X-rays from the plasma generation tend
to increase diode photoconduction.
 
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top