Need Help for Ring buffer PIC18F2550 UART

// PIC18F2550 Configuration Bit Settings

#include <xc.h>

// CONFIG1L
#pragma config PLLDIV = 5       // PLL Prescaler Selection bits (Divide by 5 (20 MHz oscillator input))
#pragma config CPUDIV = OSC3_PLL4// System Clock Postscaler Selection bits ([Primary Oscillator Src: /3][96 MHz PLL Src: /4])
#pragma config USBDIV = 2       // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes from the 96 MHz PLL divided by 2)

// CONFIG1H
#pragma config FOSC = HSPLL_HS  // Oscillator Selection bits (HS oscillator, PLL enabled (HSPLL))
#pragma config FCMEN = ON       // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor enabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOR = ON         // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 3         // Brown-out Reset Voltage bits (Minimum setting)
#pragma config VREGEN = OFF     // USB Voltage Regulator Enable bit (USB voltage regulator disabled)

// CONFIG2H
#pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = ON      // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON      // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)
#pragma config LPT1OSC = OFF    // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = OFF     // Stack Full/Underflow Reset Enable bit (Stack full/underflow will not cause Reset)
#pragma config LVP = OFF        // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected)
#pragma config CP1 = OFF        // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected)
#pragma config CP2 = OFF        // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected)
#pragma config CP3 = OFF        // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected)

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM is not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected)
#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected)
#pragma config WRT2 = OFF       // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected)
#pragma config WRT3 = OFF       // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected)

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM is not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks)




#include <string.h>

unsigned char *strr="1234567890ABCDEF";
unsigned char count=0;
unsigned char *array = "This is interrupt based transmission";


unsigned char dat[20];
volatile unsigned int head;
volatile unsigned int tail;

void send_uart(unsigned char dat);
void init_uart(void);
void tx_stn(unsigned char *str);
void delay(unsigned int del);
void delay_us(unsigned int del);
char read_from_buffer();
void store_in_buffer(unsigned char data);
unsigned char i=0;


void interrupt isr(void)
{
    if(RCIF)
    {
	if(OERR) // If over run error, then reset the receiver
	{
        	CREN = 0;
        	CREN = 1;
	}
    }
    else if(TXIF==1)
    {
        i = read_from_buffer();
         if(i!='\0')            // if not null then only send
       {
            TXREG = i;
       }
       else
       {
            i = 0;
       }
    }
}


void main()
{
    init_uart();
    i = 0;
    /********This one is not working************/
//    while(*strr!='\0')
//    {
//        store_in_buffer(*strr);
 //       *strr++;
//    }
    /***********************************/
       store_in_buffer('P');        // store data in buffer
       store_in_buffer('I');
       store_in_buffer('C');
       store_in_buffer('1');
       store_in_buffer('8');

    while(1);
}

void init_uart()
{
    TRISC6 = 1;
    TRISC7 = 1;
    PORTC = 0x00;
    RCSTA = 0x90;
    BAUDCON = 0x00;
    SPBRG = 77;                 //19200 baud rate
    TXSTA = 0x24;
    RCIE = 1;
    GIE = 1;
    PEIE = 1;
    TXIE = 1;
}

void send_uart(unsigned char dat)
{
    while(!TXIF);
    TXREG = dat;
    delay_us(50);
}

void tx_stn(unsigned char *str)
{
    while(*str!='\0')
    {
        send_uart(*str++);
        delay(1);
    }
}

void delay(unsigned int del)
{
    unsigned int i,j;
    for(i=0;i<del;i++)
        for(j=0;j<120;j++);
}


void delay_us(unsigned int del)
{
    unsigned int i;
    for(i=0;i<del;i++);
}


void store_in_buffer(unsigned char data)
{
  unsigned int next = (unsigned int)(head + 1) % 20;
  if (next != tail)
  {
      dat[head] = data;
      head = next;
  }
}


char read_from_buffer()
{
  // if the head isn't ahead of the tail, we don't have any characters
  if (head == tail) {
  return -1;        // quit with an error
  }
  else {
    char data = dat[tail];
    tail = (unsigned int)(tail + 1) % 20;
    return data;
  }
}

  if(RCIF)
    {
	if(OERR) // If over run error, then reset the receiver
	{
        	CREN = 0;
        	CREN = 1;
	}
    }

unsigned char *array = "This is interrupt based transmission";