Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Post-sim of symbol and spectre

Status
Not open for further replies.

ktx2222

Member level 5
Joined
Jan 8, 2014
Messages
81
Helped
2
Reputation
4
Reaction score
2
Trophy points
8
Activity points
613
Dear guys,

I have a question about post-layout simulation. I am using a pdk in which a cap has its spectre but the resistor only has symbol. I create two simple circuit:
- circuit (1) only contains a capacitor (spectre)
- circuit (2) only contains a resistor (symbol)
I normally extract the parasitic of those circuit and run post-sim. The post-sim result of (1) is very similar with schematic sim. However, the post-sim of (2) is not.
I don't know what is different between spectre and symbol? And can I believe the post-sim of circuit (2)?

Please give me advice. Thank in advanced.
 

The capacitor's spectre view describes a special capacitor with fixed structure, dimensions, i.e. layout, and already includes its parasitics. Its layout view tells the extractor to not re-extract these parasitics. So if you use the layout view of this (same) capacitor, the pre- and post-layout simulation results will not differ by much - just the connection wires make a difference.

The reason for this method is to achieve already a relatively reasonable pre-layout sim. result, which makes good sense for RF circuit development. Of course it's necessary to use only this standard cap layout, multiples of these if necessary.

In contrary the symbol view of the resistor just describes an ideal resistor, i.e. nothing more than its resistance value in [Ω]. Your resistor layout - extracted for the post-layout netlist - will include all the parasitics the extractor is instructed to extract (sic), hence the simulation results will differ much more.

Resistor layouts usually differ too much as to use the same method as for caps.
 
Thank erikl,
Your explanation really helps me!
 

Anyway, I want to ask one more question. Should I use "spectre" or "symbol" for the component in analogLib? I usually use "port" with "spectre" because I use spectre simulator tool. I design RF circuit. Thank.
 

Depends. If your layout comes much later than your schematic, it would be wise to set the spectre view before the symbol view in the simulator's view stop list, because then you can get more realistic analysis results already from the schematic simulation.
 
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top