Help Simulating Dickson Charge Pump

Hello, I am trying to build and simulate a Dickson Charge Pump in Cadence Virtuoso for class. I need it to bump 1v to 3v. Should be simple enough but the circuit I built is not wokring correctly.

Below are my schematics and output wave forms.






I used the design from wikipedia; I've tried various transistor widths and lengths and also different capcitor values, but I never get more than 1V at the output. My inverter is sized 12/3um (W/L). The clock has a 1ns period and a 500ps pulse width. Not sure what else to try, any pointers?

I don't necessarily need a Disckson charge pump, but it seemed the simplest one to try. Also I cannot use diodes (NCSU libraries don't have diode models), so i must stick to NMOS for the switches.

I've also tried this design, even though it is more complicated (from a class slide):



But I just get low voltage at the output.

Any help is appreciated. Thanks in advance.

Can you decrease Cout to (500/3)n

Without knowing much about Dickson, or what a normal NMOS W/L ratio should be, my thoughts turned to the following -- are you constrained to using a 1Ghz clock ? Wouldn't something slower be more appropriate and allow your caps to actually charge/ discharge through real-world impedances ?

At 1GHz you're probably sloching current in and out of the
caps without much "pumping".

At 1V gate drive, your FETs may be a big loss term, you
only can pump forward Vdd-Vt or so.

500nF capacitors are pretty damn big for a little integrated
FET to drive, a DC solution of VOUT=VDD can be reached
but no further pumping is evident - but this might be a
timescale vs capacitor value problem.

Consider making your pump FETs synchronous rather than
making them act like passive diodes. You'll kill the forward
drop that way. But you'll need level shifting of some sort,
which may put you on the wrong side of some isolation
limit perhaps.

I'm running a simulation of the doubler.

The switching arrangement resembles an H-bridge.

Your capacitors are labelled 500 nF. To get them to show charge-pump behavior, I reduced the frequency to 50 kHz.



Bias voltages are shown. These demonstrate what levels are necessary to operate the transistors/mosfets. They are N-devices in the simulation.
This is not to say P-devices cannot be used, however.

The tripler will add a similar H-bridge stage.

Ok so from the hints you guys gave me, I raised the aplitude of the clock from 1V to 2.5V and tweaked the clock to T=500us/PW=250us (2kHz) and I started to see some results:




The first set of images are for a load with a 50fF capacitor; the second are for a load of a 50k Ohm resistor.

However, I must now simulate with a load of 1k Ohm, and now no matter what combination of capacitor of frequency, I cannot generate more than 0.75V. I've tried 1fF-1F (yes 1F), in power of 10 increaments (1, 10, 100, 1000), and frequency of 100Hz-1MHz:



The only way I could generate about 1.25V was using an initial voltage of 4V, so I'm guesing I've reached the limits of this configuration and now it is acting like a voltage downscaler.

Any suggestions?

The final capacitor will charge to the output voltage. The neighboring mosfet needs to be biased several volts higher than that.

In fact, it's a good idea to check whether each mosfet is turning on entirely, and off entirely.

The best I could do was just put 6 of them in parallel in order to get the 3V.



Not the best solution, but it came to turn it in or get no credit.

Thanks anyways, hopefully this helps someone out there as well.

Since you obtained some output, you demonstrated the concept.

I believe the problem is that the mosfets were barely turning on. They are meant to act as diodes. However they are biased only a volt or so at the time they turn on.

I made a simulation of one of your schematics which contains one invert-gate. I chose a 5V supply voltage, because the invert-gate puts out 5V.



I chose a light load (3k ohms) to maintain output voltage near maximum.
This is called a x5 multiplier (nominally). However it loses a few volts due to diode drops, and parasitic resistances.

So if this is what I get with a 5V supply, then you were doing well to get any increase with a 1V supply.