Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Receiver Front-End, "Phase Shifter"?

Status
Not open for further replies.

cmosbjt

Full Member level 5
Joined
Apr 25, 2004
Messages
250
Helped
10
Reputation
20
Reaction score
2
Trophy points
1,298
Location
USA
Activity points
2,293
**broken link removed**

Hi, the above structure is the GPS downconverter IC CXA3355R from Sony:
**broken link removed**
They use a so call "Phase Shifter and Adder" to reject the image.

Is this Phase Shifter:
1. a polyphase filter
2. a 90deg phaseshift as the img below
3. or can be sth else?

Which is commonly used? 1, 2 or 3?

**broken link removed**

Thanks.
 

I think that last figure is a block diagram representation only. The implementation is using polyphase, that's the most commonly used architecture. The possible problem could be in the big values (and size) of R & C due to the low freq (1 MHz).
Also in R versus C there is a compromise:
Large R -> small C -> High noise figure
Large C -> small R -> Big area

After all analog design is to find the best compromise.....

I hope it can help.
Mazz
 

    cmosbjt

    Points: 2
    Helpful Answer Positive Rating
The last figure is used in practice as well. You can consider it the simpleeest variant of polyphase filtering.
 

    cmosbjt

    Points: 2
    Helpful Answer Positive Rating
DonJ
in simple RC network, how's solved the problem of spread of parameters with the spec of minimum rejection (typically in the range of 20~30 dB)?

Mazz
 

Mazz said:
DonJ
in simple RC network, how's solved the problem of spread of parameters with the spec of minimum rejection (typically in the range of 20~30 dB)?

Mazz

Mazz :)

The simple RC networks are, as you pointed out, not the most suitable one for high performance systems (high rejection).
People tend to incorporate careful layout for phase matching (+45 / -45 deg) and include some limiting amp. for amplitude balance in simple RC app's.

Don't misunderstand, I agree with you.

Don
 

No misunderstanding, but I thoght that there could be some new informations for my designs...
Anyway, thanks.
Mazz
 

Mazz said:
No misunderstanding, but I thoght that there could be some new informations for my designs...
Anyway, thanks.
Mazz

Well, actually you can improve the performance by calibration. A little bit messy but it works. The calibration complexity must obviously be considered against polyphase filter silicon area and signal attenuation.

A.T.B
 

Hi DonJ,
Can you talk a little bit more about the calibration?
Thanks
 

cmosbjt said:
Hi DonJ,
Can you talk a little bit more about the calibration?
Thanks

Hi

The principle is the same for image rejection calibration. You can find good papers describing it (e.g. IEEE).
It is basically compensation of the phase and amplitude errors in either a feedback/analog or pure digital signal manner.

Don
 

CXA3355 use a 90 deg Phase Shifter, and active low pass filters (point nr 2, in your enumeration).
Also some reviews said that this IC works better with external IF filter, instead of using the internal ones.
 

There's a calibration mechanism proposed by B.Razavi in his very famous paper

"Design considerations for Direct-Conversion Receivers"
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top