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debug simple nor layout. Help please!

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theelder777

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Hello all. I am currently trying to make a nor gate layout. I extracted the mos's from the schematic and made the connections. It passed DRC but failed LVS with only one mismatch. Any help will be much appreciated. I have attached the layout and the output file, I can attach the schematic too if need be (please let me know). Thank you for reading.

nor_layout.png
 

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