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How the multi bit flip flop will be design ?

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Muthuraja.M

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Hi friends,

I want to design a multi bit flip flop by using single bit flip flop ?

Tell me is it possible ?

Pls reply me with the key ideas that how to design ?
 

yes it is possible. design a dff in verilog or vhdl instantiate it in a top level module to any number of bits u want.
 

phobos1 said:
yes it is possible. design a dff in verilog or vhdl instantiate it in a top level module to any number of bits u want.
Click to expand...

I need help in coding in vhdl for multibit flip flop design.
 

Can any body give VHDL Code for master slave D flip flop with two inverters, using behavioral modeling ?
 

Talk about being lazy...

1. Resurrect a 6 month old thread! Oh, I can't create my own thread, that's too much work.
2. Then ask for code (multi-bit flip-flop) that you can find examples of, if you use a search engine! Oh, that's too much work!
3. Resurrect the same thread again after 8 more months pass! Create my own thread, whoa, that is really way too much work, I'd rather use the one I bookmarked!
4. Ask another question that you can find by using a search engine. Of course you may have to use some grey matter to translate the circuit to behavioral VHDL. No way! do work!, use my brain!, why would I ever want to do that? I'd rather just leach my answers off of edaboard.

So I guess I'll be just as lazy with my answer and just point out your lack of effort.
 

I am a newbie to vhdl and i thought it better to resurrect the old post since it was related and there were no answers.
I am working on MBFF, I did the code for master slave in structural model using two inverters and two D latches, but i am not sure how to use the sytem clock , Since I want to find the clock power consumption, and since i consider myself a beginner I posted the same. any help would be appreciated.
 

lol..yes @dhanya22,you should have to go through the forum rules once.

anyways, this might help you - **broken link removed**
 

i want it in behavioral modelling style
 

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