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[SOLVED] generating random bits on verilog

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burdurlu

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hello people on edaboard:) ,

i need to generate random bits with a length of (say) 10,000 bits on Verilog. i looked it up and found that $random command generates 32 bit random numbers but how can i use it to get 10000 random bits? help please
 

Do a for loop to generate N times 32-bit random numbers, and concatenate it to get your 10000 random bits. And obviously $random only works in simulation, not in real hardware.
 
thanks for fast response:)

im working on simulation so its okay i guess
 

Hello,

Is it for simulation only purpose ?
Because I don't think that such syntax is synthesizable. You can use instead pseudo random pattern generators (PRPG) with easy implementation like LFSR (Linear feed back shift register) but as its name indicate it is pseudo random and not random.
It generates the same sequence after a period according to reset state of flip-flops. One sequence can be considered as random, but since it is repeated many times it can not be considered as fully random.

Regards
 

DFT_designer said:
Hello,

Is it for simulation only purpose ?
Because I don't think that such syntax is synthesizable. You can use instead pseudo random pattern generators (PRPG) with easy implementation like LFSR (Linear feed back shift register) but as its name indicate it is pseudo random and not random.
It generates the same sequence after a period according to reset state of flip-flops. One sequence can be considered as random, but since it is repeated many times it can not be considered as fully random.

Regards
Click to expand...

yes, simulation only. i dont need to synthesize, but thanks for information, im new to verilog and fpga's.
 

Yup, for simulation you can use $random. And for real hardware using a LFSR as DFT_designer suggested is a good first choice, since those are easy to implement and are random enough for quite a lot of things.
 

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