Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Make a neural net with number of connections, such that memory storage for the neurons doesn't all fit in the fpga. That way you will have to make some streaming approach, which should make things extra interesting.
Hey, you asked for ideas. Now go implement that and send me a link to the design paper when you're done! XD
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
Now go implement that and send me a link to the design paper when you're done! XD