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Connection ports using VHDL

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stevy

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Hi, I am a newbie in VHDL. Hence, the question I am going to ask may seema little stupid, but I could not find an answer?

What are the commands needed to connect the output port of a counter to the input port of a multiplexor???
 

Salam,

Ok it seems that your design is compose of subcomponents like counter, mux,.... (Structural)

You can use direct or component instantiations to connect these subcomponents to form final model (top design)

In both cases you use "port map" commands to connect the subcomponents together.

Search for "component instantiations" for more details or look to this example

**broken link removed**

Bye
Eng. Amr Ahmed
 

For example you have a 2 bit counter then let its ports be c1,c2.
Let the mux have ports m1,m2
then..
in the top module you declare signals of same type as c1(= m1) and c2(= m2)
ex if the types are std_logic then
signal a1: std_logic;
signal a2: std_logic;
begin

counter_inst: counter portmap(c1=>a1,c2=>a2);
mux_inst : mux(m1=>a1,m2=>a2);
-----
-----
the above will connect the ports of your counter module to mux module.
 

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