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Why is my Pre-simulation and Post-simulation result of PSR of LDO the same?

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roki

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Hi all,

I hacked my PEX netlist to get post simulation results for my LDO regulator.The post simulation for my AC(gain margin n phase margin) did change as expected(different from my pre-simulation results) but my PSR results for my post-simulation is the same as my pre-simulation result. It is even "normal" for both pre and post to have the same results,cause practically it shouldnt be. I dont know why it stays the same?
If my PEX hacking failed, then my (GM and PM) would have stayed the same too. So, i dont think my netlist hacking failed.

Thanks
 

I can't visualize all you describe, but this reply is in case you expected a phase difference to appear when AC is going through your device.

There are times when a resistor is needed somewhere at the device, in order to create a current flow that can register in the simulation as a phase difference through your device.

The resistor may need to be installed to ground at the input of the device. Or the output.

Or in series with the input of the device.

Etc.
 

I will try my best to make it clear.

I have constructed a LDO regulator testbench to test my AC results such as the phase margin, gain margin and the power supply ratio(PSR).
This is my pre-simulation results and i got the results as it should be.
Then, i proceeded to layout. After passing DRC and LVS, next is PEX hacking. After i did my PEX, i will get my post-simulation results wrt to the layout design which i have done.
Normally, post-simulation tends to be less better due to parasitic effect from the layout. So yea, indeed my phase margin decreases slightly.But my post-simulation result of my PSR is the same as my pre-simulation.It is as if i havent done hacking at all. So, i dont know why it stays the same.

Regards
 

The power supply rejection ratio PSRR of an LDO regulator essentially is given by the pass-transistor's power supply distortion feed-through, divided by the loop gain of the error amplifier.

For a relatively large pass-transistor, the post-layout parasitics shouldn't change the distortion feed-through a lot; a gain reduction, however, should correspondingly be noticeable.
 

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