pavanucs
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hi all,
I am a newbie to cadence..
when i was designing layout for xor gate...i found the follwing drc errors
1.Nwell-stamp error float
2.p+SD to nwell distance<=10um
kindly help me out of these errors
thank you
I am a newbie to cadence..
when i was designing layout for xor gate...i found the follwing drc errors
1.Nwell-stamp error float
2.p+SD to nwell distance<=10um
kindly help me out of these errors
thank you