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Insert RAM/ROM in top module

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sp_sara

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Hi

I have a main question. I have a design which I want to insert RAM module in the top module. I generated RAMs with Artisan but I don't know how can I insert them in top?
 

You have generated a Memory with memory compiler. Then you have certainly have verilog or vhdl model of your RAM, Then you can add the file into your design project and instantiate the ram into your top module which contains all of the design sub-modules.
It is so simple.

I hope i could explain it good.
Feel free to mention the problems
Oveis
 

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