restoring divider VHDL problem

Hello,


I'm using the following division function in my VHDL code:

----------------------------------------------------------------
function divide (a : UNSIGNED; b : UNSIGNED) return UNSIGNED is
variable a1 : unsigned(a'length-1 downto 0):=a;
variable b1 : unsigned(b'length-1 downto 0):=b;
variable p1 : unsigned(b'length downto 0):= (others => '0');
variable i : integer:=0;

begin
for i in 0 to b'length-1 loop
p1(b'length-1 downto 1) := p1(b'length-2 downto 0);
p1(0) := a1(a'length-1);
a1(a'length-1 downto 1) := a1(a'length-2 downto 0);
p1 := p1-b1;
if(p1(b'length-1) ='1') then
a1(0) :='0';
p1 := p1+b1;
else
a1(0) :='1';
end if;
end loop;
return a1;

end divide;
----------------------------------------------------------------

I didn't write it myself. The code can be found at:
VHDL coding tips and tricks: A VHDL function for division two unsigned numbers

The function works well in cases when the numerator is bigger then the denominator but it fails in other cases.
For example:

result <= divide("11111", "10111"); -- should give "00001" (a decimal one)
However, it gives "10011" instead (wich is a decimal 19).

What's wrong with the code?

I have not simulated it, but I think the following line is wrong:

if(p1(b'length-1) ='1') then

I think it should be

if(p1(b'length) ='1') then

thats probably one of the limitations of the function.
I suggest using a divide IP block instead for full divides.

Now,
result <= divide("11111", "10111")
is correct it shows "00001" as it should, however, the following fails:

result <= divide("10110011101111", "10011100010000") -- 11503/10000 should be also "00000000000001"
but it's... "11010001100001"(wich is 13409 in unsigned decimal)

shaiko said:

result <= divide("10110011101111", "10011100010000") -- 11503/10000 should be also "00000000000001"
but it's... "11010001100001"(wich is 13409 in unsigned decimal)

Click to expand...

I have simulated it. The result is correct ("00000000000001") for these numbers if you make sure that you implement the bug fix in my earlier post. With the bug, I get the same wrong value "11010001100001".

Hi std_match,

It's OK now.
For some reason it didn't work at first...Tried it many times.
What I did is delete the created modelsim work library. restarted the software and recoplied it.
The result is know "00000000000001" as it should be.

Thanks for the help!