How can I use digital logic gates in spectre simulation with cadence?

Hello,

I designed a comparator in a transistor level.
I connected the comparator to a digital logic gate, like inverter or AND gate from the NCSU_Digital_Parts.
But whenever I use the logic gate, It gives me an error.

My question is,

1. Can I use digital logic gate in spectre simulation?
2. How can I fix this error message?

Thanks guys!!!!



Delete psf data in /home/users/2/hanc/cadence/simulation/3_3_DT_Comp_Practice/spectre/schematic/psf.Delete psf data in /home/users/2/hanc/cadence/simulation/3_3_DT_Comp_Practice/spectre/schematic/psf.
generate netlist...
WARNING: Netlister: The switch view schematic of cell gnd in library basic has no instances, hence is being ignored.
To netlist this cell, add this view to the stop list and to ignore any particular instance use nlAction="ignore"
WARNING: Netlister: The switch view schematic of cell vdd in library basic has no instances, hence is being ignored.
To netlist this cell, add this view to the stop list and to ignore any particular instance use nlAction="ignore"
End netlisting Dec 1 23:25:58 2011
The netlist is up to date.
Time taken to compare the design with netlist: 0.0s
...successful.
compose simulator input file...
...successful.
start simulator if needed...
...successful.
Errors encountered during simulation.

Giveitatry82 said:

1. Can I use digital logic gate in spectre simulation?

Click to expand...

Sure! I guess this is a subsequent fault from using a wrong netlister stop list.

Giveitatry82 said:

2. How can I fix this error message?

Click to expand...

I think the netlister told you:
WARNING: Netlister: The switch view schematic of cell gnd in library basic has no instances, hence is being ignored.
To netlist this cell, add this view to the stop list and to ignore any particular instance use nlAction="ignore"

Use "schematic" as first item of the stop list. Just give it a try ;-)