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ESD on-chip protection circuit

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magneticflux26

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The task is to protect the internal circuit, in my case, the rectifer, from ESD events. Our professor talks about protecting the supply pad rather than the signal pad. This makes me confused, how can you differentiate the two? I've read several papers regarding Vdd-Vss ESD protection, does this pertain to the supply pad already?

Many thanks!
 

A protection have to included into each pin of your IC. Supply pad protection plus diodes protection in each signal pin allow to provide ESD path for any combination of stressed pins.
 

Agree with mikersia. All pads need ESD protection except ground PAD(more exactly: reference PAD).
 

Supply pin protection is likely different than signal pin protection
(you're allowed, for example, about as much capacitance as you
like on the supply, not so on a high speed input; ditto pin leakage).
Often the supply rail is used as a dump for signal pin ESD current
and so the clamp design there affects all pins' protection
effectiveness.
 

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