Pulse Clock Constraints

I have 3 clocks in my design. The third pulse clock is generated based on first clock.What is the best to represent this third pulse clock.

CLK1 and CLK2(duty cycle of 48%) are non overlapping phase clocks
CLK3 is a pulse clock that is double the frequency of CLK1 but has 23% duty cycle. The CLK3 goes high 2 ns after CLK1 goes high. CLK3 is generated out of CLK1.

Can you provide some inputs to model the pulse clock.

I am currently generating clk2 based on clk1 . But clk3 is not related to clk1.I would like to generate clk3 based on clk1 as well.
create_clock -period 5 -waveform {0.1 2.5} [get_ports clk1]
create_generated_clock -name clk2 -source clk1 -edges {1 2 3 } -edge_shift {2.5 2.5 2.5} [get_ports clk2]
create_clock -period 2.5 -waveform {2 2.5} [get_ports clk3]

---------- Post added at 18:10 ---------- Previous post was at 18:08 ----------

Small correction in the constraints

create_clock -period 5 -waveform {0.1 2.4} [get_ports clk1]
create_generated_clock -name clk2 -source clk1 -edges {1 2 3 } -edge_shift {2.5 2.5 2.5} [get_ports clk2]
create_clock -period 2.5 -waveform {2 2.5} [get_ports clk3]