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standard cell routing

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design_oriented

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Why is global routing for standard cells sometimes preferred in Metal 2 layer? Although higher metals have lesser resistance, could adding vias to go to upper layers increase parasitics?
 

Do you mean that global routing is sroute i.e., follow pin routing (VDD and VSS stripes)?
If that is true, then it depends on what type of process they are using: VHV or HVH proces.
 

May be attempting to conserve higher metals to reduce congestion...May be..
 

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