Simple VHDL test bench question

Had just a quick question about a VHDL testbench I made. I am testing a full adder (a,b,c_in are my inputs) and wanted to simply test from (0,0,0 to 1,1,1) as to get all possible combinations of inputs. The reason for this project is just a simple start at vhdl/coding in general.

Anyway my question is this I have this test bench (attached) and I was able to run the simulation correctly, but I was wondering if there is a more eloquent way to realize the code:
a <= '0';
b <= '0';
c_in <= '0';
wait for 20 ns;
a <= '0';
b <= '0';
c_in <= '1';
wait for 20 ns; etc.etc View attachment My test file.txt

I feel like this was a horrible way to realize all input combinations and would like to learn how to set it up better as I will be moving on to bigger and more complicated vhdl projects

How about a for loop?

Nightlamp,
I would assume that c_in is your carrier bit?....If so the beauty of VHDL is that VHDL takes care of the carrier bit for you. Are you trying to add from 000 to 111? If so you can use integer range instead of std_logic when you declare your variables. something like this

PORT(
A:IN INTEGER RANGE 0 to 7;
SUM:OUT INTEGER RANGE 0 to 7);

Then in your architecture you can just use SUM <= A+1; this will give you all the values between 000 and 111.
Hope this was what you are talking about.

Are you trying to add A and B, or just make an adder that starts at 000 and ends at 111?

I can probably do that. Would there be a way to set them up as waveforms. say a switches every 10ns, b switches every 20ns, and c switches every 40ns?

If you do that it sounds more like a shift registry than an adder.... I have never used delays in the code like that in adders. What software are you using?

hfbroady said:

Nightlamp,
I would assume that c_in is your carrier bit?....If so the beauty of VHDL is that VHDL takes care of the carrier bit for you. Are you trying to add from 000 to 111? If so you can use integer range instead of std_logic when you declare your variables. something like this

PORT(
A:IN INTEGER RANGE 0 to 7;
SUM:OUT INTEGER RANGE 0 to 7);

Then in your architecture you can just use SUM <= A+1; this will give you all the values between 000 and 111.
Hope this was what you are talking about.

Are you trying to add A and B, or just make an adder that starts at 000 and ends at 111?

Click to expand...

A basic full adder circuit has a carry in. Building a half and full adders are usually part of a digital electronics course, and so do have two inputs A and B with a carry in input. What you have created is a counter, which uses an adder to count up. Also, a counter is not very practical when you dont have a clock. A full adder circuit is asynchronous.

As for the OP and waveforms, the origional style you have is the easiest to use, and probably most appropriate for what you are doing. But you can do a lot more like reading from text files to input your stimulus. You might also want to try something like this:

a <= '1', '0' after 10 ns, '1' after 20 ns;
etc.
The only weakness to doing this is that it doesnt synchronise with a clock. But Im sure you will come onto that