newmedia
Member level 2
Hello all,
I know this is a repeated question without a definite answer, but I have to ask this again.
Have you ever seen a example of PLL design flow with cadence or other cad tools? It does not matter whether it's based on Cadence SpectreRF or Synopsys HspiceRF.
I know Cadence has "Noise Aware PLL Design Flow", but the design database is not included in MMSIM, because the database has proprietary IPs in it. It's only available to someone who sign on a NDA. Also the database will not be given to the universities.
In my opinion, there is no such example right now. However, I'm very desperate, so I'm repeating the same question as other many guys. Please don't say "try to take a look Best's book" or "Study Razzavi's book". I already know they discuss the PLL design in detail. However what I want is an real example.
I know this is a repeated question without a definite answer, but I have to ask this again.
Have you ever seen a example of PLL design flow with cadence or other cad tools? It does not matter whether it's based on Cadence SpectreRF or Synopsys HspiceRF.
I know Cadence has "Noise Aware PLL Design Flow", but the design database is not included in MMSIM, because the database has proprietary IPs in it. It's only available to someone who sign on a NDA. Also the database will not be given to the universities.
In my opinion, there is no such example right now. However, I'm very desperate, so I'm repeating the same question as other many guys. Please don't say "try to take a look Best's book" or "Study Razzavi's book". I already know they discuss the PLL design in detail. However what I want is an real example.