how to design opamp with bias current 50pA???

hi friends,
i am designing two stage opamp with bias current 50pA,so to have less current i am increasing lengths of transistor,it is coming to 12m(which is too much),by keeping width 180n.

and my dc gain (45dB) is constant for 100Ghz,i need help ,
give me some ideas to have 50pA current with out too much increase in length??

hoping to get positive replies from all of u

Not totally positive from my side, sorry!

With a W/L=1 and a (somehow) injected op. current of 50pA you could work in very very deep weak inversion (IC≈1e-4) with a gm/Id of about 30/V . This achieves a gm≈1.5 nA/V , and with an estimated load capacitance of Cl=10fF a UGB≈24kHz. A bit far from the required 100GHz. :-(

i need to operate the amplifier to get
gainbandwidth=90MHz
slewrate=80V/ms
CMRR=110dB
Maximum offset voltage: 25mV
Minimum trans-impedance bandwidth: 1 MHz
Maximum input referred noise: 70nV/√Hz

i am designing trans-impedence amplifier,
in analog design can we increase the length ,if so by how much it can be greater than width?

i designed my opamp with bias current 50pA,for that i increased my lengths to (2m), for differential stage i am getting dc gain (45 dB) and it is constant for 100MHz, it is not even falling
after connecting transconductance stage my gain is getting reduced to 20dB ,and this time also my gain curve is constant

so suggest me whether i can use normal two-stage opamp for designing opamp with this specification,
if not suggest some suitable alternatives

please help me