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100 MHz Clock on Virtex 5 LX110T FPGA

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Senel

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Hi,

Can I please know how to give a clock of 100 MHz on the Virtex 5 LX110T? (http://www.hitechglobal.com/boards/v5pciexpress.htm)
The crystal says that it is 50 MHz and even when I give 100 MHz on the timing constraints file, my code on the board runs at 50 MHz(I checked this with a counter). I m using the J16 pin, which is the oscialltor externally fixed.
I want to know how to give a 100 MHz clock.

Thank you

Added after 7 minutes:

By the way I m using the board in Standalone mode and programming with the JTAG
Thanks
 

Your crystal has a limitation of 50 MHZ, it can not generate a signal of freequency of 100 MHZ, changes in timing constraints in ISE can not make any changes in the crystal.
If it would be the other way round i.e that if you have a clock of 100 Mhz crystal then you can use simple logic & give 50 Mhz to your FPGA or any other device.

You need to get a 100 Mhz crystal.
 

thanks for the reply.
I generated a clock doubler on the Xilinx Core generator and gave that clock to the design and now it works at 100 MHz
 

Can you please let me know how you did it ?
Because I was under a wrong impression that a crystal can not send a frequency over its max limit.
 

We will be using DCM from Xilinx for that sake
 

You could use the DCM or just multiply the clock, and another way to multiply the 50Mhz clock to 100Mhz is to use "XOR". Of course, DCM's the recommended way.
 

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