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24 bit by 24 bit division in vhdl

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rakesh045

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I am in need of a vhdl code which divides a 24 bit numerator by a 24 bit denominator.
The denominator is always greater than or equal to numerator.

So the value will always be between 0 and 1 and I require upto 3 decimal places

The numerator and denominator are both std_logic_vectors

Is is possible to represent the signal in fixed point arithmetic and still get the result.
pls help me... its urgent...
 

So the value will always be between 0 and 1 and I require upto 3 decimal places.
Binary arithmetic doesn't know decimal places. You have to choose a suitable representation for the result first. My suggestion
would be a binary fixed point format with a factor of 2**10. It can be easily achieved by extending the numerator to 34 bit,
simply add 10 zero bits at the right. The quotient can be truncated to 10 bit.
 

that seems fine. but the quotient is always 0 or 1. what is important in my case is the digits to the right of decimal point.

for eg: it would be like 40/50=0.800

I can obtain the quotient i.e the left of the decimal just by subtracting the 2 numbers once, using the binary shift and subtract method. But in that method i obtain the right of decimal as a reminder

eg: 60/50=quotient 1 and reminder 10 which is 1 10/50
if i apply to the above case I will only get as 40/50, but the required form of representation in my case is 0.800
 

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